receiverproxy

96x96 1/48 ICN2065

96x96, 1/48 scan, ICN2065, rcvbp

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Module

96x96 1/48

entry

file
config/panels/mined/96x96-48s-icn2065.toml
status
generates
origin
mined
vendor files
9
agreement
1
vendors
Colorlight
examples
P1.667+2065+192X96-48S+E320.rcvbp Q1.6AG48(2065+5366)-V2.3 -W1.rcvbp Q1.6AG48(2065+2018) -W1.rcvbp
notes
the pixel map has 4608 entries; the block-7 image builder packs at most 4096, so `rxp config gen` writes the .rcvbp but not the boot image

chip

name
ICN2065 (mined)
library
config/chips/mined/icn2065.toml

spec

name
96x96-48s-icn2065

module

width
96
height
96
scan
48
line_dir
0
data_groups
1
serial_clock
10

screen

width
96
height
96

Wiring

mapping

reversed_groups
true
reversed_lines
false
block
96

boot

arm_at_boot
true

Timing

current

gains
[208, 208, 208, 43]
percent
[0.1, 0.1, 0.1]

config/panels/mined/96x96-48s-icn2065.toml

# generated by scripts/corpus-mine.py; regenerate rather than edit

name = "96x96-48s-icn2065"

[meta]
status = "generates"
origin = "mined"
sources = 9
agreement = 1.00
examples = ["P1.667+2065+192X96-48S+E320.rcvbp", "Q1.6AG48(2065+5366)-V2.3 -W1.rcvbp", "Q1.6AG48(2065+2018) -W1.rcvbp"]
vendors = ["Colorlight"]
notes = "the pixel map has 4608 entries; the block-7 image builder packs at most 4096, so `rxp config gen` writes the .rcvbp but not the boot image"

[module]
width = 96
height = 96
scan = 48
line_dir = 0
data_groups = 1
serial_clock = 10

[screen]
width = 96
height = 96

[chip]
library = "config/chips/mined/icn2065.toml"

[current]
gains = [208, 208, 208, 43]
percent = [0.1, 0.1, 0.1]

[mapping]
reversed_groups = true
reversed_lines = false
block = 96

[boot]
arm_at_boot = true