172x86 1/43 LS9936
172x86, 1/43 scan, LS9936, rcvbp
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Module
entry
- file
- config/panels/172x86-43s-ls9936.toml
- status
- derived
- vendor files
- 6
- agreement
- 0.67
- vendors
- Colorlight
- examples
- Q1.8AR43(9936+32020)-V2.3-W1 .rcvbp Q1.8AR43(9936+32020)-V2.9-W1.rcvbp Q1.8AR43(9936+9736)-V2.9-W1 .rcvbp
- notes
- Values are the majority across 6 vendor configuration files, 67% of the files for this module class. Never driven on a bench. The pixel map has 7396 entries; the block-7 image builder packs at most 4096, so `rxp config gen` writes the .rcvbp but not the boot image.
chip
- name
- LS9936
- library
- config/chips/ls9936.toml
spec
- name
- 172x86-43s-ls9936
module
- width
- 172
- height
- 86
- scan
- 43
- line_dir
- 0
- data_groups
- 0
- serial_clock
- 14
screen
- width
- 172
- height
- 86
Wiring
mapping
- reversed_groups
- true
- reversed_lines
- false
- block
- 172
boot
- arm_at_boot
- true
Timing
current
- gains
- [43, 43, 43, 43]
- percent
- [0.1, 0.1, 0.1]
config/panels/172x86-43s-ls9936.toml
# generated by scripts/corpus-mine.py; regenerate rather than edit name = "172x86-43s-ls9936" [meta] status = "derived" sources = 6 agreement = 0.67 examples = ["Q1.8AR43(9936+32020)-V2.3-W1 .rcvbp", "Q1.8AR43(9936+32020)-V2.9-W1.rcvbp", "Q1.8AR43(9936+9736)-V2.9-W1 .rcvbp"] vendors = ["Colorlight"] notes = "Values are the majority across 6 vendor configuration files, 67% of the files for this module class. Never driven on a bench. The pixel map has 7396 entries; the block-7 image builder packs at most 4096, so `rxp config gen` writes the .rcvbp but not the boot image." [module] width = 172 height = 86 scan = 43 line_dir = 0 data_groups = 0 serial_clock = 14 [screen] width = 172 height = 86 [chip] library = "config/chips/ls9936.toml" [current] gains = [43, 43, 43, 43] percent = [0.1, 0.1, 0.1] [mapping] reversed_groups = true reversed_lines = false block = 172 [boot] arm_at_boot = true