16x104 1/52 ICN2065
16x104, 1/52 scan, ICN2065, rcvbp
Download
Module
entry
- file
- config/panels/mined/16x104-52s-icn2065.toml
- status
- generates
- origin
- mined
- vendor files
- 9
- agreement
- 1
- vendors
- Colorlight
- examples
- Q1.5AP52(2065+2018)-W1.rcvbp Q1.5AP52(2065+5366)-V4.2-W1.rcvbp LCH1.5-208x832-52S-6168E-2018-3840Hz 领秀5G K5+.rcvbp
chip
- name
- ICN2065 (mined)
- library
- config/chips/mined/icn2065.toml
spec
- name
- 16x104-52s-icn2065
module
- width
- 16
- height
- 104
- scan
- 52
- line_dir
- 0
- data_groups
- 0
- serial_clock
- 8
screen
- width
- 16
- height
- 104
Wiring
mapping
- reversed_groups
- true
- reversed_lines
- false
- block
- 16
boot
- arm_at_boot
- true
Timing
current
- gains
- [208, 208, 208, 43]
- percent
- [0.1, 0.1, 0.1]
config/panels/mined/16x104-52s-icn2065.toml
# generated by scripts/corpus-mine.py; regenerate rather than edit name = "16x104-52s-icn2065" [meta] status = "generates" origin = "mined" sources = 9 agreement = 1.00 examples = ["Q1.5AP52(2065+2018)-W1.rcvbp", "Q1.5AP52(2065+5366)-V4.2-W1.rcvbp", "LCH1.5-208x832-52S-6168E-2018-3840Hz \u9886\u79c05G K5+.rcvbp"] vendors = ["Colorlight"] [module] width = 16 height = 104 scan = 52 line_dir = 0 data_groups = 0 serial_clock = 8 [screen] width = 16 height = 104 [chip] library = "config/chips/mined/icn2065.toml" [current] gains = [208, 208, 208, 43] percent = [0.1, 0.1, 0.1] [mapping] reversed_groups = true reversed_lines = false block = 16 [boot] arm_at_boot = true